Asynchronous ARM


The AMULET microprocessors is a series of asynchronous implementations of the ARM processor architecture developed as part of the pioneering research of Stephen Furber's APT Group at the University of Manchester. AMULET1, the first in the series, is the first ever asynchronous  implementation of a full-scale commercial microprocessor.  

Occarm: When ARM met the Transputer


As part of the design of the AMULET1 processor, I investigated the suitability of CSP for the modelling of asynchronous VLSI circuits and the subsequent distributed simulation of such CSP models on parallel machines. This research led to the development of Occarm, a framework for modelling and distributed simulation of asynchronous VLSI systems.

Occarm has been instantiated in an occam simulation model of AMULET1. Occarm (meta)-executes ARM6 machine code produced by a standard ARM compiler. The Occarm simulator utilises novel synchronisation, partitioning, load balancing and monitoring techniques for the execution of the model on parallel Transputer-based machines. Occarm was configured to run on the T-Rack, a pioneering Transputer-based parallel machine designed and built as part of the ParSiFal Project. Occarm has made  several groundbreaking contributions:

  • It was the first ever effort to utilise and evaluate CSP as a modelling paradigm for full-scale complex asynchronous VLSI systems.
  • It pioneered the topic of distributed simulation of asynchronous VLSI systems, and delivered novel algorithms for circuit partitioning, synchronisation and monitoring.
  • It pioneered the use of Transputer-based machines for Distributed Simulation
  • It brought together for the first time the two Great British Chip Inventions: the Transputer and the ARM.


The occam source code of the entire occarm system is available here.


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