(-- 
   IF (Instruction Fetch) stage of MIPS pipeline 
   'IF.balsa'
--)


import[PC]
import[AAU]
import[Arb1]
import[Arb2]
import[ADD4]

procedure IF(input start      : bit;
             input IDch, EXch : ch;
             input MEMch    : MEMch;
             output BaseAddID: word;
             output CInsAdd : InsAdd;
             output CP0W2   : CP0Write) 
is local channel PCplus4,NTarget, PCvalue,NPC:InsAdd
         channel NTarget1, NTarget2: ch
begin
      PC   (start, NPC, PCvalue, CInsAdd) ||
      ADD4 (PCvalue, BaseAddID, PCplus4) ||
      Arb1 (PCplus4, MEMch, NTarget1) ||
      Arb2 (EXch, IDch, NTarget2) ||
      AAU  (NTarget1, NTarget2, NPC, CP0W2)
end
    
