#INCLUDE "/home/amu5/users/georget/Phd/Simul/Defs/defs.inc"
#USE "/home/amu5/users/georget/Phd/Simul/library"


PROC IMMPipe(CHAN OF BUNDLE ToImmD, FromImm, FromImmA,ToImm)

  CHAN OF BUNDLE ToIE,  ToRegAA, ToRegB:

  --------------------------------
  PROC RegA(CHAN OF BUNDLE Din, Dout, Ain, Aout)
    SEQ
      fifo.stage( Din, Dout, Ain, Aout)
  :
  --------------------------------
  PROC RegB(CHAN OF BUNDLE Din, Dout, Ain, Aout)
    SEQ
      last.fifo.stage( Din, Dout, Ain, Aout)
  :
  --------------------------------

  PROC ImmExt(CHAN OF BUNDLE Input, Output)

    [MESGLEN]INT  In, Nout:
    INT temp, out, tin, clock:
    BOOL end:

    SEQ
      end:=FALSE

      Input?In
      IF
        In[0]<>FINISH
          SKIP
        TRUE
          end:=TRUE
      WHILE end=FALSE
        SEQ
          clock:=In[TIME.STAMP]
          tin:=In[0]
          temp:=((tin>>26) /\ 3)

          IF
            temp=1
              SEQ
                out:=(tin /\ #FFF)
      
            temp=2
              SEQ
                out:=(tin /\#FFFFFF)
                IF
                  (tin /\ #800000)<>0
                    SEQ
                      out:=(out\/#FF000000)
                  TRUE
                    SKIP
            
            TRUE
              SEQ
                out:=(tin/\#FF)
          Nout[0]:=out
          Nout[TIME.STAMP]:=clock+IMM.DELAY.INT
          Nout[TIME.IN]:=In[TIME.IN]
          Nout[STALL]:=In[STALL]
          Output!Nout
          Input?In
          IF
            In[0]<>FINISH
              SKIP
            TRUE
              end:=TRUE


      Output!In
  :
  ----------------------------------------------------
  PAR
    RegA(ToImmD,ToIE,FromImmA, ToRegAA )
    ImmExt(ToIE, ToRegB)
    RegB( ToRegB, FromImm, ToRegAA ,ToImm )
:
    
      



   
